The present invention relates to semiconductor structures, and particularly to a semiconductor structure including a radio frequency switch on a semiconductor-on-insulator (SOI) substrate, design structure and methods of manufacturing the same, and methods of operating the same.
Semiconductor devices such as field effect transistors are employed as a switching device for radio frequency (RF) signals in analog and RF applications. Semiconductor-on-insulator (SOI) substrates are typically employed for such applications since parasitic coupling between devices through the substrate is reduced due to the low dielectric constant of a buried insulator layer. For example, the dielectric constant of silicon, which comprises the entirety of the substrate of a bulk silicon substrate, is about 11.9 in gigahertz ranges. In contrast, the dielectric constant of silicon oxide, which isolates a top semiconductor layer containing devices from a handle substrate, is about 3.9. By providing the buried insulator layer, which has a dielectric constant less than the dielectric constant of a semiconductor material in a bulk substrate, the SOI substrate reduces capacitive coupling between an individual semiconductor device and the substrate, and consequently, reduces secondary capacitive coupling between semiconductor devices through the substrate.
However, even with the use of an SOI substrate, the secondary capacitive coupling of electrical signals between semiconductor devices is significant due to the high frequency range employed in the radio frequency applications, which may be, for example, from about 900 MHz to about 1.8 GHz, and may include even higher frequency ranges. This is because the capacitive coupling between electrical components increases linearly with frequency.
For a radio frequency (RF) switch formed on an SOI substrate, the semiconductor devices comprising the RF switch and the signal processing units in a top semiconductor layer are capacitively coupled through a buried insulator layer to a bottom semiconductor layer. Even if the semiconductor devices in the top semiconductor layer employ a power supply voltage from about 3 V to about 9V, the transient signals and signal reflections in an antenna circuitry may increase the actual voltage in the top semiconductor layer up to about 30V. Such voltage conditions induce a significant capacitive coupling between the semiconductor devices subjected to such high voltage signals and an induced charge layer within an upper portion of the bottom semiconductor layer, which changes in thickness and charge polarity at the frequency of the RF signal in the semiconductor devices in the top semiconductor layer. The induced charge layer capacitively couples with other semiconductor devices in the top semiconductor layer including the semiconductor devices that an RF switch is supposed to isolate electrically. The spurious capacitive coupling between the induced charge layer in the bottom semiconductor layer and the other semiconductor devices provides a secondary capacitive coupling, which is a parasitic coupling that reduces the effectiveness of the RF switch. In this case, the RF signal is applied to the other semiconductor devices through the secondary capacitive coupling although the RF switch is turned off.
Referring to FIG. 1, a prior art radio frequency switch comprises a set of serially connected field effect transistors formed on a semiconductor-on-insulator (SOI) substrate 8. The SOI substrate 8 comprises a bottom semiconductor layer 10, a buried insulator layer 20, and a top semiconductor layer 30. The top semiconductor layer 30 includes top semiconductor portions 32 and shallow trench isolation structures 33 which provide electrical isolation between adjacent top semiconductor portions 32. Each field effect transistor comprises a gate electrode 42, a gate dielectric 40, a gate spacer 44, and source and drain regions (not shown) formed in a top semiconductor portion 32. The field effect transistors are serially connected via a set of contact vias 88 and metal lines 98. The contact vias 88 are embedded in a middle-of-line (MOL) dielectric layer 80, and the metal lines 98 are formed in a interconnect-level dielectric layer 90.
A high voltage signal, which may have a voltage swing up to about +/−30V induces an induced charge layer 11 in an upper portion of the bottom semiconductor layer 10 through a capacitive coupling, which is schematically indicated by a set of capacitors 22 between the semiconductor devices and the bottom semiconductor layer 10. The induced charge layer 11 contains positive charges while the voltage in the semiconductor devices in the top semiconductor layer 30 have a negative voltage, and negative charges while the voltage in the semiconductor devices in the top semiconductor layer 30 have a positive voltage. The high frequency of the RF signal in the semiconductor devices induces changes in the thickness of the induced charge layer 11 and the polarity of the charges in the induced charge layer at the same frequency as the frequency of the RF signal.
The time required to dissipate the charges in the induced charge layer 11 is characterized by an RC time constant, which is determined by the capacitance of the set of capacitors 22 and a substrate resistance. The substrate resistance is the resistance between the induced charge layer 11 and electrical ground, which is typically provided by an edge seal at the boundary of a semiconductor chip. The substrate resistance is symbolically represented by a resistor 12 between the induced charge layer 11 and electrical ground. Such substrate resistance may be extremely high because the bottom semiconductor layer 10 typically employs a high resistivity semiconductor material having a resistivity of about 5 Ohms-cm to minimize eddy current. Further, the lateral distance to an edge seam may be up to about half the lateral dimension of the semiconductor chip, e.g., on the order of about 1 cm.
Such large substrate resistance 12 increases the RC time constant for the dissipation of the charge in the induced charge layer 11 beyond the time scale of the period of the RF signal. Since dissipation of the charge in the induced charge layer 11 is effectively barred due to a long RC time constant, the capacitive coupling between the semiconductor devices in the top semiconductor layer 30 and the bottom semiconductor layer 10 results in loss of signal even during the off-state of the RF switch. Further, spurious RF signal is introduced into semiconductor devices that are disconnected by the RF switch from the RF signal through the secondary capacitive coupling of the semiconductor devices through the induced charge layer 11.
During one half of each frequency cycle of the RF signal, the top portion of the bottom semiconductor layer 10 directly underneath the buried insulator layer 20 is in an accumulation condition, in which charge carriers in the bottom semiconductor layer 10 accumulate near the bottom surface of the buried insulator layer 20. Specifically, when the conductivity type of the bottom semiconductor layer 10 is p-type and the voltage of the top semiconductor portions 32 is negative relative to the voltage at the bottom semiconductor layer 10, or when the conductivity type of the bottom semiconductor layer 10 is n-type and the voltage of the top semiconductor portions 32 is positive relative to the voltage at the bottom semiconductor layer 10, the majority charge carriers, i.e., holes if the bottom semiconductor layer 10 is p-type or electrons if the bottom semiconductor layer 10 is n-type, accumulate in the upper portion of the bottom semiconductor layer 10 to form the induced charge layer 11.
Further, during the other half of each frequency cycle of the RF signal, the top portion of the bottom semiconductor layer 10 directly underneath the buried insulator layer 20 is in a depletion condition, in which charge carriers in the bottom semiconductor layer 10 are repelled from the bottom surface of the buried insulator layer 20. The thickness of the induced depletion layer is proportional to the square-root of the voltage differential between the top semiconductor portions 32 and the bottom semiconductor layer 10. When the conductivity type of the bottom semiconductor layer 10 is p-type and the voltage of the top semiconductor portions 32 is positive relative to the voltage at the bottom semiconductor layer 10, or when the conductivity type of the bottom semiconductor layer 10 is n-type and the voltage of the top semiconductor portions 32 is negative relative to the voltage at the bottom semiconductor layer 10, the majority charge carriers, i.e., holes if the bottom semiconductor layer 10 is p-type or electrons if the bottom semiconductor layer 10 is n-type, are repelled from the upper portion of the bottom semiconductor layer 10 to form the induced charge layer 11, which is depleted of the majority charges. Further, when magnitude of the voltage differential between the top semiconductor portions 32 and the bottom semiconductor layer 10 is sufficiently great, an inversion layer including minority charges, i.e., electrons if the bottom semiconductor layer 10 is p-type or holes if the bottom semiconductor layer 10 is n-type, is formed within the induced charge layer 11. The thickness of the depletion zone and the inversion layer in the induced charge layer 11 depend on the magnitude of the voltage differential between the top semiconductor portions 32 and the bottom semiconductor layer 10. The change in the thickness of the induced charge layer 11 as well as the amount of charge in the induced charge layer generates additional harmonic signals of the RF frequency in this phase of the frequency cycle of the RF signal, which is coupled to semiconductor devices in a top semiconductor portion 32, thereby providing a spurious signal even when the RF switch is turned off.
In view of the above, there exists a need for a semiconductor structure providing enhanced signal isolation for semiconductor devices from a bottom semiconductor layer in a semiconductor-on-insulator (SOI) substrate, methods of manufacturing the same, and methods of operating the same.
Particularly, there exists a need for a semiconductor structure in which generation of harmonic components of the RF signal through variation in the capacitance of an induced charge layer is minimized thereby reducing spurious signals, methods of manufacturing the same, and methods of operating the same.